Cadence

DSP Hardware Design Engineer

SAN JOSE
Full-time
$136,500 to $253,500
Posted Aug 26, 2026

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Skills

Communication
Sales
Verilog

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Position Requirements are:

•MS in EE /Computer Engg. with 5 years of relevant CPU or DSP design experience.

•Excellent logic design skills as demonstrated by successful CPU/DSP/ NPU /Hardware Accelerator implementations/tape-outs.

•Experience in data-path component design is a plus.

•Excellent knowledge of Verilog/SystemVerilog and popular EDA implementation, simulation and verification tools.

•Experience in AI-native logic design, analysis and/or optimization workflows is a plus.

•Good knowledge of computer architecture and pipe-line designs is required.

•Experience in scripting languages. Good knowledge of Perl is required.

•Experience with assembly language programming is a plus.

•Knowledge and interest in commonly used DSP algorithms in audio, speech, image, video and communication domains is a plus

•Understanding of C/C compilers is a plus.

•Excellent written and oral communication skills necessary.

•Self-starter, motivated and eager to learn and contribute to the development of state-of-the-art DSP products

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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