Fairchild Imaging, Inc.

Analog IC Design Engineer

San Jose, CA
Full-time
$120,000 to $160,000
Posted Nov 9, 2026

Skills

Circuit Design
Physical Design

Job description

Fairchild Imaging, headquartered in San Jose, California is a specialty image sensor design and manufacturing company with deep experience in developing leading edge performance CMOS image sensors. Our portfolio of image sensors can be found in many high-performance imaging applications like space exploration, medical x-ray, sciences, quantum computing, machine vision, low light, and 360 situational awareness.

Analog IC Design Engineer 

We are seeking an experienced Integrated Circuit Engineer who is responsible for designing, simulating, and testing analog circuits using CMOS technology. This role requires ability to work on building blocks such as amplifiers, oscillators, and data converters. The role involves collaborating with other engineers to ensure that the circuits meet performance, power, and area requirements, as well as troubleshooting and optimizing designs for manufacturing. In addition, use specialized software tools for circuit simulation and layout verification.

Key Responsibilities

•Develop precision analog building blocks.

•Run schematic-level simulations, pre- and post-layout parasitic extractions.

•Supervise or execute physical layout design.

Required Qualifications

•BS in Electrical Engineering, or related field.

•3 to 8 years of industry experience working with deep-submicron CMOS processes (ranging from mature nodes like 180nm, 65nm down to 20nm

•Deep understanding of CMOS device physics, analog microelectronics, feedback systems, stability, and low-noise design.

•Expertise in building blocks like operational amplifiers, bandgap reference, LDOs (Low-Dropout regulators), oscillators (VCO, ring, LC tank), and data converters (ADCs/DACs, PLLs, LVDS, sLVDS, SerDes).

•Proficiency in simulation and layout software, primarily Cadence (Virtuoso, Spectre, AMS) and Spice.

•Understanding IC layout constraints, floor planning, and running DRC (Design Rule Checking), LVS (Layout Versus Schematic), and ERC (Electrical Rule Checking).

Preferred Qualifications

•CMOS image sensor design or sensor readout electronics.

•Experience with Stacked chips and/or 1D-2D Stitching.

•Mixed-signal integration with digital blocks.

•Low-noise and low-power design.

Fairchild Imaging provides our employees with a range in benefits offerings that includes:

•9/80 Schedule - You get every other Friday off!

•Medical, Dental and Vision coverage with multiple plan offerings

•Health Savings Account with an employer contribution annually

•401(k) retirement plans with Employer matching

•Tuition Reimbursement

•Generous Paid Time Off policy 

The compensation salary range for this role is $120,000 to $160,000. Actual compensation packages are based on several factors that are unique to each candidate, including but not limited to skill set, depth of experience, education, certifications, and knowledge.

Fairchild Imaging is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.